Computers are ubiquitous in today's society. They come in all different varieties and can be found in places such as automobiles, laptops or home personal computers, banks, personal digital assistants, cell phones, as well as many businesses. In addition, as computers become more commonplace and software becomes more complex, there is a need for the computing devices to perform faster and more reliably in smaller and smaller packages.
As the design of computing systems continues to increase in complexity, certain tradeoffs are generally considered by a designer. For example, static random access memory (SRAM) circuits of a very large scale integration (VLSI) microprocessor design may provide some parasitic decoupling capacitance to the power supply. Such a decoupling capacitance may aid in stabilizing fluctuations within a power supply signal powering the design circuit. However, in some microprocessor designs, the SRAM circuit is provided with a voltage regulator that allows the SRAM circuit to operate at a lower voltage and reduce power leakage of the SRAM circuit, but also removes the beneficial decoupling capacitance aspect of the SRAM circuit. Without the parasitic decoupling capacitance of the SRAM circuits, reduction of the power supply signal may occur, thereby degrading the overall performance of the design.
Thus, techniques are described herein that provide an SRAM circuit of a VLSI design, such as a microprocessor design, that retains the beneficial parasitic decoupling capacitance of the SRAM circuit while continuing to operate the SRAM circuit at a lower voltage to combat power leakage of the SRAM circuit. It is with these and other issues in mind that various aspects of the present disclosure were developed.